VLSI Design

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Created by HITHENDER REDDY CHALLA
Last updated Thu, 27-Oct-2022
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Course overview

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Curriculum for this course
9 Lessons 06:51:57 Hours
VLSI
9 Lessons 06:51:57 Hours
  • Logic Gates
    00:43:04
  • Multiplexer
    00:43:36
  • Number System
    00:59:04
  • Sequence Generator
    00:45:12
  • Karnaugh Map
    01:00:24
  • Combinational CKTS
    00:34:43
  • Flip Flop
    00:34:14
  • Ripple Counter
    00:31:27
  • Melay Machine
    01:00:13
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HITHENDER REDDY CHALLA

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